SIMD basics

Contents
Packed versus scalar
Alignment
Four adds at once

Packed versus scalar

The P suffix (addps, mulps) works on all lanes of an XMM register at once: four single-precision floats, or two doubles with the PD forms. One instruction, four results:

movaps xmm0, [a] ; load 4 aligned floats movaps xmm1, [b] addps xmm0, xmm1 ; four sums at once movaps [sum], xmm0

Alignment

MOVAPS requires 16-byte-aligned memory; the unaligned form MOVUPS works anywhere but can be slower on old CPUs. Align data with align 16 before the definition:

section .data align 16 a dd 1.0, 2.0, 3.0, 4.0

Four adds at once

A loop that adds two arrays of floats can process four elements per iteration with the P forms, then handle the remainder (length mod 4) with the scalar SD forms. That is the whole trick of hand-written SIMD.

Next: Interrupts

Article author: Arthur Isaev

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