Performance: cycles and cache

Measuring cycles

RDTSC reads the time-stamp counter into EDX:EAX: the number of cycles since reset. Sandwich the code you measure between two RDTSC reads and subtract, and the difference is the cycle count:

rdtsc mov r8, rdx shl r8, 32 or r8, rax ; start ; ... measured code ... rdtsc shl rdx, 32 or rax, rdx sub rax, r8 ; cycles elapsed

Cache lines

Memory moves in cache lines of 64 bytes. Touching one byte loads its whole line, so the next 63 bytes are nearly free. A stride that skips lines (every 1024th byte, say) touches a new line every time and runs far slower.

Sequential versus random

A sequential scan of a large array runs at memory bandwidth; a random walk of the same array stalls on misses. When a profiler says a program is memory-bound, the fix is usually a better layout - arrays of structs instead of linked lists, smaller elements, or a sorted index.

Next: Modern x86: AVX tour

Article author: Arthur Isaev